Issued Patents All Time
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11868241 | Method and system for optimizing a verification test regression | Yael Kinderman, Yosinori Watanabe, Michele Petracca | 2024-01-09 |
| 10607039 | Constrained metric optimization of a system on chip | Yael Kinderman, Shlomi Uziel, Michele Petracca, Yosinori Watanabe | 2020-03-31 |
| 10423741 | Constrained metric verification analysis of a system on chip | Michele Petracca, Yosinori Watanabe, Yael Kinderman, Shlomi Uziel | 2019-09-24 |