MS

Mahesh D. Sadhankar

CS Cadence Design Systems: 2 patents #781 of 2,263Top 35%
📍 Atrauli, IN: #27 of 145 inventorsTop 20%
Overall (All Time): #1,719,448 of 4,157,543Top 45%
2
Patents All Time

Issued Patents All Time

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
12332304 System and method for automatic fault detection in an electronic design Sushobhit Singh, Arvind Nembili Veeravalli, Naresh Kumar, Daksh Bakshi 2025-06-17
11455450 System and method for performing sign-off timing analysis of electronic circuit designs Sushobhit Singh, Arvind Nembili Veeravalli, Naresh Kumar, Beenish, Ankit Sethi 2022-09-27