Issued Patents All Time
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8769454 | Register-transfer level (RTL) design checking for exploring simulation and/or synthesis mismatches and ambiguous language semantics using categorization | Andy S. Tsay, Shih-Chieh Wu | 2014-07-01 |