Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5528605 | Delayed acknowledgement in an asymmetric timer based LAN communications protocol | John A. Ywoskus, Bruce E. Mann, Roger Levesque | 1996-06-18 |
| 5161217 | Buffered address stack register with parallel input registers and overflow protection | Richard A. Lemay, Steven A. Tague, William E. Woods | 1992-11-03 |
| 5136500 | Multiple shared memory arrangement wherein multiple processors individually and concurrently access any one of plural memories | Richard A. Lemay, David A. Wallace, William E. Woods | 1992-08-04 |
| 4935737 | Data selection matrix | William E. Woods, Richard A. Lemay | 1990-06-19 |
| 4775929 | Time partitioned bus arrangement | William E. Woods, Richard A. Lemay, Steven A. Taque | 1988-10-04 |