Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5430862 | Emulation of CISC instructions by RISC instructions using two pipelined stages for overlapped CISC decoding and RISC execution | Steven S. Smith, Arnold J. Smith, Richard P. Brown, Thomas F. Joyce | 1995-07-04 |
| 4992930 | Synchronous cache memory system incorporating tie-breaker apparatus for maintaining cache coherency using a duplicate directory | George J. Barlow | 1991-02-12 |