TR

Timothy Ramsdale

Broadcom: 20 patents #470 of 9,346Top 6%
Overall (All Time): #209,580 of 4,157,543Top 6%
21
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
9264529 Drive strength adjustment through voltage auto-sense Stephen Barlow, Martin Whitfield 2016-02-16
8285975 Register file with separate registers for compiler code and low level code Stephen Barlow, Neil Bailey, David Plowman, Robert Swann 2012-10-09
8180937 System method for I/O pads in mobile multimedia processor (MMP) that has bypass mode wherein data is passed through without being processed by MMP 2012-05-15
8135363 Method and system for an integrated circuit supporting auto-sense of voltage for drive strength adjustment Stephen Barlow, Martin Whitfield 2012-03-13
7877528 System method for I/O pads in mobile multimedia processor (MMP) that has bypass mode wherein data is passed through without being processed by MMP 2011-01-25
7818540 Vector processing system Stephen Barlow, Neil Bailey, David Plowman, Robert Swann 2010-10-19
7793007 Method and system for deglitching in a mobile multimedia processor 2010-09-07
7640379 System method for I/O pads in mobile multimedia processor (MMP) that has bypass mode wherein data is passed through without being processed by MMP 2009-12-29
7457941 Vector processing system Stephen Barlow, Neil Bailey, David Plowman, Robert Swann 2008-11-25
7350057 Scalar result producing method in vector/scalar system by vector unit from vector results according to modifier in vector instruction Stephen Barlow, Neil Bailey, David Plowman, Robert Swann 2008-03-25
7203800 Narrow/wide cache Stephen Barlow, Neil Bailey, David Plowman, Robert Swann 2007-04-10
7200724 Two dimensional data access in a processor Stephen Barlow, Neil Bailey, David Plowman, Robert Swann 2007-04-03
7167972 Vector/scalar system with vector unit producing scalar result from vector results according to modifier in vector instruction Stephen Barlow, Neil Bailey, David Plowman, Robert Swann 2007-01-23
7130985 Parallel processor executing an instruction specifying any location first operand register and group configuration in two dimensional register file Stephen Barlow, Neil Bailey, David Plowman, Robert Swann 2006-10-31
7107429 Data access in a processor Stephen Barlow, Robert Swann, Nel Bailey, David Plowman 2006-09-12
7080216 Data access in a processor Stephen Barlow, Neil Bailey, David Plowman, Robert Swann 2006-07-18
7069417 Vector processing system Stephen Barlow, Neil Bailey, David Plowman, Robert Swann 2006-06-27
7043618 System for memory access in a data processor Stephen Barlow, Robert Swann, Neil Bailey, David Plowman 2006-05-09
7036001 Vector processing system Stephen Barlow, Neil Bailey, David Plowman, Robert Swann 2006-04-25
7028143 Narrow/wide cache Stephen Barlow, Neil Bailey, David Plowman, Robert Swann 2006-04-11
6839079 Video-telephony system Stephen Barlow, Robert Swann, Neil Bailey, David Plowman 2005-01-04