Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9270875 | Dual image capture processing | Laurent Brisedoux, Ron Fridental, Benjamin Sewell, Naushir Patuck, Cresida Harding | 2016-02-23 |
| 9058668 | Method and system for inserting software processing in a hardware image sensor pipeline | Gary Keall, Clive Walker | 2015-06-16 |
| 8798386 | Method and system for processing image data on a per tile basis in an image sensor pipeline | Adrian Lees | 2014-08-05 |
| 8593528 | Method and system for mitigating seesawing effect during autofocus | Cressida Magdalen Harding | 2013-11-26 |
| 8553109 | Concurrent image processing for generating an output image | Naushir Patuck, Benjamin Sewell, Graham John Veitch | 2013-10-08 |
| 8503722 | Method and system for determining how to handle processing of an image based on motion | Phil Elwell, Naushirwan Navroze Patuck, Benjamin Sewell | 2013-08-06 |
| 8285975 | Register file with separate registers for compiler code and low level code | Stephen Barlow, Neil Bailey, Timothy Ramsdale, Robert Swann | 2012-10-09 |
| 7818540 | Vector processing system | Stephen Barlow, Neil Bailey, Timothy Ramsdale, Robert Swann | 2010-10-19 |
| 7457941 | Vector processing system | Stephen Barlow, Neil Bailey, Timothy Ramsdale, Robert Swann | 2008-11-25 |
| 7350057 | Scalar result producing method in vector/scalar system by vector unit from vector results according to modifier in vector instruction | Stephen Barlow, Neil Bailey, Timothy Ramsdale, Robert Swann | 2008-03-25 |
| 7203800 | Narrow/wide cache | Stephen Barlow, Neil Bailey, Timothy Ramsdale, Robert Swann | 2007-04-10 |
| 7200724 | Two dimensional data access in a processor | Stephen Barlow, Neil Bailey, Timothy Ramsdale, Robert Swann | 2007-04-03 |
| 7167972 | Vector/scalar system with vector unit producing scalar result from vector results according to modifier in vector instruction | Stephen Barlow, Neil Bailey, Timothy Ramsdale, Robert Swann | 2007-01-23 |
| 7130985 | Parallel processor executing an instruction specifying any location first operand register and group configuration in two dimensional register file | Stephen Barlow, Neil Bailey, Timothy Ramsdale, Robert Swann | 2006-10-31 |
| 7107429 | Data access in a processor | Stephen Barlow, Timothy Ramsdale, Robert Swann, Nel Bailey | 2006-09-12 |
| 7080216 | Data access in a processor | Stephen Barlow, Neil Bailey, Timothy Ramsdale, Robert Swann | 2006-07-18 |
| 7069417 | Vector processing system | Stephen Barlow, Neil Bailey, Timothy Ramsdale, Robert Swann | 2006-06-27 |
| 7043618 | System for memory access in a data processor | Stephen Barlow, Timothy Ramsdale, Robert Swann, Neil Bailey | 2006-05-09 |
| 7036001 | Vector processing system | Stephen Barlow, Neil Bailey, Timothy Ramsdale, Robert Swann | 2006-04-25 |
| 7028143 | Narrow/wide cache | Stephen Barlow, Neil Bailey, Timothy Ramsdale, Robert Swann | 2006-04-11 |
| 6839079 | Video-telephony system | Stephen Barlow, Timothy Ramsdale, Robert Swann, Neil Bailey | 2005-01-04 |