Issued Patents All Time
Showing 25 most recent of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12314208 | Systems, apparatuses, methods, and non-transitory computer-readable storage devices for de-serializing and serializing data transmission | — | 2025-05-27 |
| 10523341 | Methods and systems for in-situ crosstalk measurements in communication systems | Petar Ivanov Krotnev, Marc Lacroix | 2019-12-31 |
| 10483343 | Inductors for chip to chip near field communication | Euhan Chong, Zhonggui Xiang | 2019-11-19 |
| 10284397 | FFE-aided CDR to calibrate phase offset and enhance gain in baud rate sampling phase detector | Yuchun Lu, Henry Wong | 2019-05-07 |
| 10153917 | Frequency/phase-shift-keying for back-channel serdes communication | Dustin T. Dunwell, Anthony Chan Carusone | 2018-12-11 |
| 10009035 | Dynamic control of ADC resolution | Marc Lacroix, Semyon Lebedev, Henry Wong | 2018-06-26 |
| 10003481 | FFE-aided CDR to calibrate phase offset and enhance gain in baud rate sampling phase detector | Yuchun Lu, Henry Wong | 2018-06-19 |
| 9712349 | FFE-aided CDR to calibrate phase offset and enhance gain in baud rate sampling phase detector | Yuchun Lu, Henry Wong | 2017-07-18 |
| 9553600 | Skew detection and correction in time-interleaved analog-to-digital converters | Marc Lacroix, Henry Wong | 2017-01-24 |
| 9515785 | System and method for detecting loss of signal | Henry Wong | 2016-12-06 |
| 8265132 | Conditioning circuit that spectrally shapes a serviced bit stream | Ali Ghiasi | 2012-09-11 |
| 8228972 | SERDES with jitter-based built-in self test (BIST) for adapting FIR filter coefficients | John Hogeboom | 2012-07-24 |
| 8090047 | System and method for programmably adjusting gain and frequency response in a 10-gigabit ethernet/fibre channel system | Ichiro Fujimori | 2012-01-03 |
| 8014471 | Bit stream conditioning circuit having adjustable input sensitivity | Ali Ghiasi | 2011-09-06 |
| 7974337 | High speed receive equalizer architecture | Afshin Momtaz, Mario Caresosa, David Chung, Guangming Yin, Bruce J. Currivan +2 more | 2011-07-05 |
| 7822113 | Integrated decision feedback equalizer and clock and data recovery | Afshin Momtaz | 2010-10-26 |
| 7733998 | System and method for programmably adjusting gain and frequency response in a 10-gigabit Ethernet/fibre channel system | Ichiro Fujimori | 2010-06-08 |
| 7664170 | Bit stream linear equalizer with AGC loop | Ali Ghiasi | 2010-02-16 |
| 7623600 | High speed receive equalizer architecture | Afshin Momtaz, Mario Caresosa, David Chung, Guangming Yin, Bruce J. Currivan +2 more | 2009-11-24 |
| 7515629 | Conditioning circuit that spectrally shapes a serviced bit stream | Ali Ghiasi | 2009-04-07 |
| 7321612 | Bit stream conditioning circuit having adjustable PLL bandwidth | Ali Ghiasi | 2008-01-22 |
| 7317769 | Bit stream conditioning circuit having adjustable input sensitivity | Ali Ghiasi | 2008-01-08 |
| 7206366 | System and method for programmably adjusting gain and frequency response in a 10-GigaBit ethernet/fibre channel system | Ichiro Fujimori | 2007-04-17 |
| 7206337 | Bit stream conditioning circuit having output pre-emphasis | Ali Ghiasi | 2007-04-17 |
| 6807225 | Circuit and method for self trimming frequency acquisition | Andre M. Bischof | 2004-10-19 |