Issued Patents All Time
Showing 76–100 of 118 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7324548 | Transceiver system and method supporting variable rates and multiple protocols | Vikram Natarajan, Kang Xiao, Mario Caresosa, Jay Proano, David Chung +3 more | 2008-01-29 |
| 7325175 | Phase adjust using relative error | — | 2008-01-29 |
| 7292101 | Digitally adjustable variable gain amplifier (VGA) using switchable differential pairs | Namik Kocaman | 2007-11-06 |
| 7266172 | Fully differential CMOS phase-locked loop | Armond Hairapetian, Jun Cao | 2007-09-04 |
| 7263151 | High frequency loss of signal detector | Pang-Cheng Hsu | 2007-08-28 |
| 7215171 | Digitally controlled threshold adjustment circuit | Namik Kocaman | 2007-05-08 |
| 7205841 | Automatic gain control with three states of operation | Namik Kocaman | 2007-04-17 |
| 7205792 | Methods and circuitry for implementing first-in first-out structure | Xin Wang, Jun Cao, Armond Hairapetian, David Chung | 2007-04-17 |
| 7202707 | High frequency binary phase detector | — | 2007-04-10 |
| 7170964 | Transition insensitive timing recovery method and apparatus | Namik Kocaman | 2007-01-30 |
| 7167024 | Methods and circuitry for implementing first-in first-out structure | Xin Wang, Jun Cao, Armond Hairapetian, David Chung | 2007-01-23 |
| 7132727 | Layout technique for C3MOS inductive broadbanding | Michael Green | 2006-11-07 |
| 7103130 | Phase-locked loop circuit | Jun Cao | 2006-09-05 |
| 7099278 | Line loop back for very high speed application | — | 2006-08-29 |
| 7088797 | Phase lock loop with cycle drop and add circuitry | David Chung, Pang-Cheng Hsu | 2006-08-08 |
| 7053720 | Configurable voltage controlled oscillator system and method including dividing forming a portion of two or more divider paths | Mario Caresosa, Namik Kocaman | 2006-05-30 |
| 7049856 | High speed peak amplitude comparator | Wee-Guan Tan, Armond Hairapetian | 2006-05-23 |
| 7042271 | Resistor compensation apparatus | David Chung, Mario Caresosa | 2006-05-09 |
| 7034606 | VGA-CTF combination cell for 10 Gb/s serial data receivers | Mario Caresosa, Guangming Yin | 2006-04-25 |
| 7017098 | Built-in self-test for multi-channel transceivers without data alignment | Jun Cao | 2006-03-21 |
| 6993106 | Fast acquisition phase locked loop using a current DAC | — | 2006-01-31 |
| 6963221 | Methods and circuitry for implementing first-in first-out structure | Xin Wang, Jun Cao, Armond Hairapetian, David Chung | 2005-11-08 |
| 6963220 | Methods and circuitry for implementing first-in first-out structure | Xin Wang, Jun Cao, Armond Hairapetian, David Chung | 2005-11-08 |
| 6940306 | Methods and circuitry for implementing first-in first-out structure | Xin Wang, Jun Cao, Armond Hairapetian, David Chung | 2005-09-06 |
| 6909762 | Phase-locked loop circuit | Jun Cao | 2005-06-21 |