Issued Patents All Time
Showing 101–118 of 118 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6888381 | High speed peak amplitude comparator | Wee-Guan Tan, Armond Hairapetian | 2005-05-03 |
| 6864752 | Configurable voltage controlled oscillator system and method | Mario Caresosa, Namik Kocaman | 2005-03-08 |
| 6864558 | Layout technique for C3MOS inductive broadbanding | Michael Green | 2005-03-08 |
| 6760394 | CMOS lock detect with double protection | Jun Cao | 2004-07-06 |
| 6748041 | GM cell based control loops | Germain Gutierrez | 2004-06-08 |
| 6725408 | Built-in self-test for multi-channel transceivers without data alignment | Jun Cao | 2004-04-20 |
| 6721380 | Fully differential CMOS phase-locked loop | Armond Hairapetian, Jun Cao | 2004-04-13 |
| 6696854 | Methods and circuitry for implementing first-in first-out structure | Xin Wang, Jun Cao, Armond Hairapetian, David Chung | 2004-02-24 |
| 6621362 | Varactor based differential VCO band switching | Armond Hairapetian | 2003-09-16 |
| 6549599 | Stable phase locked loop having separated pole | — | 2003-04-15 |
| 6526113 | GM cell based control loops | German Gutierrez | 2003-02-25 |
| 6389092 | Stable phase locked loop having separated pole | — | 2002-05-14 |
| 6204980 | High speed gain stage with DC offset cancellation for servo demodulator circuit | Mario Caresosa | 2001-03-20 |
| 6144223 | Integrated circuit SCSI input receiver having precision high speed input buffer with hysteresis | — | 2000-11-07 |
| 6084433 | Integrated circuit SCSI input receiver having precision high speed input buffer with hysteresis | — | 2000-07-04 |
| 5950115 | GHz transceiver phase lock loop having autofrequency lock correction | Mohammad Nejad | 1999-09-07 |
| 5945855 | High speed phase lock loop having high precision charge pump with error cancellation | — | 1999-08-31 |
| 5933037 | High speed phase lock loop having constant bandwidth | — | 1999-08-03 |