JZ

Jiawen Zhang

AP Avago Technologies General Ip (Singapore) Pte.: 4 patents #274 of 2,004Top 15%
Meta: 3 patents #2,208 of 6,845Top 35%
AL Avago Technologies International Sales Pte. Limited: 2 patents #297 of 1,094Top 30%
BC Beijing Boe Technology Development Co.: 1 patents #690 of 1,775Top 40%
BO BOE: 1 patents #7,844 of 12,373Top 65%
📍 Irvine, CA: #878 of 6,241 inventorsTop 15%
🗺 California: #50,852 of 386,348 inventorsTop 15%
Overall (All Time): #398,985 of 4,157,543Top 10%
12
Patents All Time

Issued Patents All Time

Showing 1–12 of 12 patents

Patent #TitleCo-InventorsDate
12401335 Integrated transimpedance amplifier with a digital signal processor for high-speed optical receivers Delong Cui, Afshin Momtaz, Kun Chuai, Jun Cao 2025-08-26
12366922 Drive control circuit, driving method thereof, and haptic feedback apparatus Jijing HUANG, Zongmin LIU 2025-07-22
12148112 Systems and methods for presenting digital assets within artificial environments via a loosely coupled relocalization service and asset management service Alvaro Collet Romea, Jingming Dong, Xiaoyang Gao, Yuheng Ren, Raul Mur Artal +2 more 2024-11-19
D1031911 Mosquito repellent lamp 2024-06-18
11966073 Reflective four-in-one light-emitting key core module Jinxin Ding, Maoyu Lin 2024-04-23
11722109 Integrated transimpedance amplifier with a digital signal processor for high-speed optical receivers Delong Cui, Afshin Momtaz, Kun Chuai, Jun Cao 2023-08-08
11715269 Systems and methods for presenting digital assets within artificial environments via a loosely coupled relocalization service and asset management service Alvaro Collet Romea, Jingming Dong, Xiaoyang Gao, Yuheng Ren, Raul Mur Artal +2 more 2023-08-01
11132841 Systems and methods for presenting digital assets within artificial environments via a loosely coupled relocalization service and asset management service Alvaro Collet Romea, Jingming Dong, Xiaoyang Gao, Yuheng Ren, Raul Mur Artal +2 more 2021-09-28
10277210 Clock skew suppression for time-interleaved clocks Hyo Gyuem Rhew, Adesh Garg, Meisam Honarvar Nazari, Ali Nazemi, Jun Cao 2019-04-30
10069508 Multiplexer circuit for a digital to analog converter Adesh Garg, Ali Nazemi, Jun Cao 2018-09-04
10014877 Multi-segmented all logic DAC Adesh Garg, Ali Nazemi, Burak Catli, Anand J. Vasani, Jun Cao +2 more 2018-07-03
9685969 Time-interleaved high-speed digital-to-analog converter (DAC) architecture with spur calibration Adesh Garg, Ali Nazemi, Anand J. Vasani, Hyo Gyuem Rhew, Jun Cao +3 more 2017-06-20