Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6628001 | Integrated circuit die having alignment marks in the bond pad region and method of manufacturing same | Sailesh Chittipeddi | 2003-09-30 |
| 6230293 | Method for quality and reliability assurance testing of integrated circuits using differential Iddq screening in lieu of burn-in | Sailesh Chittipeddi, Daryl E. Diehl, Thomas N. Hofacker, Richard Jenkins, Mamata Patnaik +3 more | 2001-05-08 |