Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9012308 | Integrated circuit structures containing a strain-compensated compound semiconductor layer and methods and systems related thereto | Darwin Gene Enicks, John Chaffee | 2015-04-21 |
| 8530934 | Integrated circuit structures containing a strain-compensated compound semiconductor layer and methods and systems related thereto | Darwin Gene Enicks, John Chaffee | 2013-09-10 |
| 7651919 | Bandgap and recombination engineered emitter layers for SiGe HBT performance optimization | Darwin Gene Enicks | 2010-01-26 |
| 7408812 | Low-voltage single-layer polysilicon EEPROM memory cell | Muhammad Chaudhry | 2008-08-05 |
| 7300849 | Bandgap engineered mono-crystalline silicon cap layers for SiGe HBT performance enhancement | Darwin Gene Enicks | 2007-11-27 |
| 7208795 | Low-cost, low-voltage single-layer polycrystalline EEPROM memory cell integration into BiCMOS technology | Muhammad Chaudhry | 2007-04-24 |
| 7144775 | Low-voltage single-layer polysilicon eeprom memory cell | Muhammad Chaudhry | 2006-12-05 |
| 5631180 | Method of fabricating high threshold metal oxide silicon read-only-memory transistors | Alex Gyure, John E. Berg, Pete Manos | 1997-05-20 |
| 5498896 | High threshold metal oxide silicon read-only-memory transistors | Alex Gyure, John E. Berg, Pete Manos | 1996-03-12 |
| 5389565 | Method of fabricating high threshold metal oxide silicon read-only-memory transistors | Alex Gyure, John E. Berg, Pete Manos | 1995-02-14 |