Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12387930 | Method and wafer processing furnace for forming an epitaxial stack of semiconductor epitaxial layers on a plurality of substrates | Dieter Pierreux, Steven R. A. Van Aerde, Wilco Verweij, Bert Jongbloed, Charles Dezelah | 2025-08-12 |
| 12362174 | Method and wafer processing furnace for forming an epitaxial stack on a plurality of substrates | Steven R. A. Van Aerde, Wilco Verweij, Bert Jongbloed, Dieter Pierreux, Rami Khazaka +4 more | 2025-07-15 |
| 11646204 | Method for forming a layer provided with silicon | Dieter Pierreux, Steven R. A. Van Aerde, Bert Jongbloed, Werner Knaepen, Wilco Verweij | 2023-05-09 |
| 11501968 | Method for providing a semiconductor device with silicon filled gaps | Dieter Pierreux, Anna Trovato, Steven R. A. Van Aerde, Bert Jongbloed, Wilco Verweij | 2022-11-15 |
| 11230766 | Substrate processing apparatus and method | Dieter Pierreux, Cornelis Thaddeus Herbschleb, Werner Knaepen, Bert Jongbloed, Steven R. A. Van Aerde +3 more | 2022-01-25 |
| 10460932 | Semiconductor device with amorphous silicon filled gaps and methods for forming | Steven R. A. Van Aerde, Maarten Stokhof, Bert Jongbloed, Dieter Pierreux | 2019-10-29 |
| 10453685 | Forming semiconductor device by providing an amorphous silicon core with a hard mask layer | Steven R. A. Van Aerde, Maarten Stokhof, Bert Jongbloed, Dieter Pierreux, Werner Knaepen | 2019-10-22 |