Issued Patents All Time
Showing 51–64 of 64 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6171981 | Electrode passivation layer of semiconductor device and method for forming the same | — | 2001-01-09 |
| 6096630 | Method for fabricating semiconductor device | Byung-Hak Lee | 2000-08-01 |
| 6077750 | Method for forming epitaxial Co self-align silicide for semiconductor device | Dong Kyun Sohn | 2000-06-20 |
| 5824600 | Method for forming a silicide layer in a semiconductor device | Hyung Jun Kim | 1998-10-20 |
| 5744398 | Method of forming electrode of semiconductor device | Byung-Hak Lee | 1998-04-28 |
| 5712181 | Method for the formation of polycide gate in semiconductor device | Hyeong-Joon Kim | 1998-01-27 |
| 5668040 | Method for forming a semiconductor device electrode which also serves as a diffusion barrier | — | 1997-09-16 |
| 5665209 | Method for forming refractory metal nitride film | — | 1997-09-09 |
| 5645887 | Method for forming platinum silicide plugs | — | 1997-07-08 |
| 5607884 | Method for fabricating MOS transistor having source/drain region of shallow junction and silicide film | — | 1997-03-04 |
| 5604140 | Method for forming fine titanium nitride film and method for fabricating semiconductor element using the same | — | 1997-02-18 |
| 5599734 | Method for fabricating MOS transistor utilizing doped disposable layer | Sang-jin Choi | 1997-02-04 |
| 5591667 | Method for fabricating MOS transistor utilizing doped disposable layer | Sang-jin Choi | 1997-01-07 |
| 5413957 | Method for fabricating MOS transistor having source/drain region of shallow junction and silicide film | — | 1995-05-09 |