Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7436196 | Method and apparatus for measuring die-level integrated circuit power variations | William C. Athas, Herbert Lopez-Aguado | 2008-10-14 |
| 7167181 | Deferred shading graphics pipeline processor having advanced features | Jerome F. Duluk, Jr., Richard E. Hessel, Vaughn T. Arnold, Jack Benkual, Joseph P. Bratt +19 more | 2007-01-23 |
| 6717576 | Deferred shading graphics pipeline processor having advanced features | Jerome F. Duluk, Jr., Richard E. Hessel, Vaughn T. Arnold, Jack Benkual, Joseph P. Bratt +19 more | 2004-04-06 |
| 6671747 | System, apparatus, method, and computer program for execution-order preserving uncached write combine operation | Jack Benkual, Jerome F. Duluk, Jr. | 2003-12-30 |
| 6597363 | Graphics processor with deferred shading | Jerome F. Duluk, Jr., Richard E. Hessel, Vaughn T. Arnold, Jack Benkual, Joseph P. Bratt +11 more | 2003-07-22 |
| 6268875 | Deferred shading graphics pipeline processor | Jerome F. Duluk, Jr., Richard E. Hessel, Vaughn T. Arnold, Jack Benkual, Joseph P. Bratt +11 more | 2001-07-31 |
| 6229553 | Deferred shading graphics pipeline processor | Jerome F. Duluk, Jr., Richard E. Hessel, Vaughn T. Arnold, Jack Benkual, Joseph P. Bratt +11 more | 2001-05-08 |
| 5570051 | Multiplexed by-passable memory devices with increased speed and improved flip-flop utilization | David Chiang, Napoleon W. Lee, Nicholas Kucharewski | 1996-10-29 |
| 5565792 | Macrocell with product-term cascade and improved flip flop utilization | David Chiang, Napoleon W. Lee, David Harrison, Nicholas Kucharewski, Jeffrey H. Seltzer | 1996-10-15 |
| 5357153 | Macrocell with product-term cascade and improved flip flop utilization | David Chiang, Napoleon W. Lee, David Harrison, Nicholas Kucharewski, Jeffrey H. Seltzer | 1994-10-18 |
| 5349249 | Programmable logic device having security elements located amongst configuration bit location to prevent unauthorized reading | David Chiang, Wei-Yi Ku, George H. Simmons, Robert W. Barker, II | 1994-09-20 |
| 5302866 | Input circuit block and method for PLDs with register clock enable selection | David Chiang, Jeffrey H. Seltzer, Jeffrey Goldberg | 1994-04-12 |