Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10282169 | Floating-point multiply-add with down-conversion | Liang-Kai Wang, Terence M. Potter, Andrew M. Havlir, Yu Sun, Xiao-Long Wu +1 more | 2019-05-07 |
| 8448107 | Method for piecewise hierarchical sequential verification | Nathan Francis Sheeley, Mark H. Nodine, Irfan Waheed, Patrick Peters, Adrian Isles | 2013-05-21 |