Elad RAZ — 25 Patents at Apple

Elad RAZ has been granted 25 US patents while listed as an inventor at Apple. The first was granted in 2020 and the most recent in December 2025. Elad RAZ ranks #158,593 of 4,157,543 US inventors in our database (top 3.8%). Patent records list Elad RAZ in Ramat Gan, IL.

Issued Patents All Time

Showing 1–25 of 25 patents

Patent #	Title	Co-Inventors	Date
12505046	System and method for dynamic cluster-based cache coherency for multi-core processors	Dan SHECHTER	2025-12-23
12493471	Optimizing execution of code on reconfigurable hardware using likely data values based on data sampling	Ilan TAYARI	2025-12-09
12461752	Reusing thread identification values when executing concurrent threads	Ilan TAYARI, Ronen Gal	2025-11-04
12360902	Reconfigurable cache architecture and methods for cache coherency	—	2025-07-15
12340221	Executing concurrent threads on a reconfigurable processing grid	Ilan TAYARI	2025-06-24
12333231	Reconfigurable integrated circuit (IC) device and a system and method of configuring thereof	Ilan Tayati, Ronen Gal, Oded Margalit, Elad Shliselberg	2025-06-17
12197919	Dynamic software interface translation for computing in a heterogeneous environment	Ilan TAYARI, Itay Bookstein, Jonathan Lavi	2025-01-14
12189412	Dynamic allocation of executable code for multi-architecture heterogeneous computing	Ilan TAYARI	2025-01-07
12130736	System and method for sharing a cache line between non-contiguous memory areas	Dan SHECHTER	2024-10-29
12056376	Interconnected memory grid with bypassable units	Yoav Lossin, Ron Schneider, Ilan TAYARI, Eyal Nagar	2024-08-06
12020069	Memory management in a multi-processor environment	Ilan TAYARI, Dan SHECHTER, Yuval Asher Deutsher	2024-06-25
11995419	Graphical user interface for code to dataflow graph representation	Oshri Kdoshim	2024-05-28
11966619	Background processing during remote memory access	Yaron Dinkin	2024-04-23
11875153	Executing concurrent threads on a reconfigurable processing grid	Ilan TAYARI	2024-01-16
11720491	System and method for sharing a cache line between non-contiguous memory areas	Dan SHECHTER	2023-08-08
11720496	Reconfigurable cache architecture and methods for cache coherency	—	2023-08-08
11644990	Interconnected memory grid with bypassable units	Yoav Lossin, Ron Schneider, Ilan TAYARI, Eyal Nagar	2023-05-09
11630669	Dynamic allocation of executable code for multiarchitecture heterogeneous computing	Ilan TAYARI	2023-04-18
11294686	Optimizing reconfigurable hardware using data sampling	Ilan TAYARI	2022-04-05
11269526	Interconnected memory grid with bypassable units	Yoav Lossin, Ron Schneider, Ilan TAYARI, Eyal Nagar	2022-03-08
11176041	Reconfigurable cache architecture and methods for cache coherency	—	2021-11-16
11144238	Background processing during remote memory access	Yaron Dinkin	2021-10-12
11113059	Dynamic allocation of executable code for multi-architecture heterogeneous computing	Ilan TAYARI	2021-09-07
10817344	Directed and interconnected grid dataflow architecture	Ilan TAYARI	2020-10-27
10817309	Runtime optimization of configurable hardware	—	2020-10-27

Elad RAZ — 25 Patents

Issued Patents All Time

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