Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12228994 | Method, apparatus, and system for calibrating a processor power level estimate | Sanjay Patel, Hoan Phan Tran, Mitrajit Chatterjee, Abhishek NIRAJ, Anuradha RAGHUNATHAN | 2025-02-18 |
| 9413344 | Automatic calibration circuits for operational calibration of critical-path time delays in adaptive clock distribution systems, and related methods and systems | Keith Alan Bowman, Jeffrey Todd Bridges, Yeshwant Nagaraj Kolla, Jihoon Jeong, Francois Ibrahim Atallah +2 more | 2016-08-09 |