Issued Patents All Time
Showing 26–32 of 32 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9317100 | Accelerated cache rinse when preparing a power state transition | Paul Kitchin | 2016-04-19 |
| 9262322 | Method and apparatus for storing a processor architectural state in cache memory | — | 2016-02-16 |
| 9043628 | Power management of multiple compute units sharing a cache | Paul Kitchin, Steven J. Kommrusch | 2015-05-26 |
| 8909867 | Method and apparatus for allocating instruction and data for a unified cache | — | 2014-12-09 |
| 8791713 | Method and apparatus for bypassing silicon bugs | — | 2014-07-29 |
| 5829049 | Simultaneous execution of two memory reference instructions with only one address calculation | Mark R. Storey, Patrick Knebel, Stephen R. Undy | 1998-10-27 |
| 5623616 | Floating point operaton throughput control | Philip L. Vitale | 1997-04-22 |