Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5490255 | Expedited execution of pipelined command having self-ordering operand processing requirements | Christopher I. W. Norrie | 1996-02-06 |
| 5426783 | System for processing eight bytes or less by the move, pack and unpack instruction of the ESA/390 instruction set | Chris Norrie, Allan J. Zmyslowski | 1995-06-20 |
| 4817048 | Divider with quotient digit prediction | Quang Huy Nguyen, R. Morse Wade | 1989-03-28 |
| 4802088 | Method and apparatus for performing a pseudo branch in a microword controlled computer system | Quang Huy Nguyen, Stephen Simmonds | 1989-01-31 |
| 4800516 | High speed floating-point unit | Stephen S. C. Si, H. P. Sherman Lee | 1989-01-24 |
| 4792793 | Converting numbers between binary and another base | Jongwen Chiou | 1988-12-20 |
| 4773035 | Pipelined data processing system utilizing ideal floating point execution condition detection | Hsiao-Peng S. Lee, Stephen S. C. Si | 1988-09-20 |
| 4761756 | Signed multiplier with three port adder and automatic adjustment for signed operands | Hsiao-Peng S. Lee, John C. Oneto | 1988-08-02 |
| 4760550 | Saving cycles in floating point division | Solomon J. Katzman | 1988-07-26 |
| 4707783 | Ancillary execution unit for a pipelined data processing system | Hsiao-Peng S. Lee, Stephen S. C. Si | 1987-11-17 |
| 4685058 | Two-stage pipelined execution unit and control stores | Hsiao-Peng S. Lee, Stephen S. C. Si | 1987-08-04 |
| 4578750 | Code determination using half-adder based operand comparator | Gene M. Amdahl, Hsiao-Peng S. Lee, Stephen Stuart | 1986-03-25 |