| 7765508 |
Method and system for generating multiple implementation views of an IC design |
Mark B. Roberts |
2010-07-27 |
| 7757194 |
Method and system for generating implementation files from a high level specification |
Mark B. Roberts |
2010-07-13 |
| 7334209 |
Method and system for generating multiple implementation views of an IC design |
Mark B. Roberts |
2008-02-19 |
| 7308656 |
Method and apparatus for generating a boundary scan description and model |
Mark B. Roberts |
2007-12-11 |
| 7284227 |
Method and system for generating implementation files from a high level specification |
Mark B. Roberts |
2007-10-16 |
| 6543740 |
Mechanism for transmitting movement in up to six degrees-of-freedom |
Robert Gaunt, Andre Anthony |
2003-04-08 |
| 6078528 |
Delay control circuit using dynamic latches |
Robert Anders Johnson, Richard A. Carberry |
2000-06-20 |
| 5933369 |
RAM with synchronous write port using dynamic latches |
Robert Anders Johnson, Richard A. Carberry |
1999-08-03 |
| 4975595 |
Scannable register/latch circuit |
Daniel Chang |
1990-12-04 |
| 4843383 |
Transistor matrix shifter |
Steven Tibbitts, Warren Snyder |
1989-06-27 |