SA

Sai Lalith Chaitanya Ambatipudi

AM AMD: 3 patents #3,141 of 9,279Top 35%
📍 San Jose, CA: #14,517 of 32,062 inventorsTop 50%
🗺 California: #149,087 of 386,348 inventorsTop 40%
Overall (All Time): #1,358,712 of 4,157,543Top 35%
3
Patents All Time

Issued Patents All Time

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
11941248 Compression of sparse tensors Vamsi Nalluri, Mrinal J. Sarmah, Rajeev Patwari, Shreyas Manjunath, Sandeep Jayant Sathe 2024-03-26
11842168 Circuit architecture for determining threshold ranges and values of a dataset Vamsi Nalluri, Sandeep Jayant Sathe, Chaithanya Dudha, Krishna Kishore Bhagavatula 2023-12-12
8386828 Circuit for estimating latency through a FIFO buffer Seu Wah Low, Christopher J. Borrelli, Loren Jones 2013-02-26