RB

Rohit Bhadana

AM AMD: 2 patents #3,994 of 9,279Top 45%
📍 Faridabad, IN: #125 of 351 inventorsTop 40%
Overall (All Time): #1,778,577 of 4,157,543Top 45%
2
Patents All Time

Issued Patents All Time

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
12086521 Circuit design simulation and clock event reduction Tharun Kumar Ksheerasagar, Hemant Kashyap, Pratyush Ranjan 2024-09-10
11630935 Data traffic injection for simulation of circuit designs Amit Kasat, Tharun Kumar Ksheerasagar, Hemant Kashyap, Madhusudana Reddy 2023-04-18