QQ

Qadeer A. Qureshi

AM AMD: 23 patents #450 of 9,279Top 5%
FS Freeescale Semiconductor: 10 patents #296 of 3,767Top 8%
TI Texas Instruments: 6 patents #2,401 of 12,488Top 20%
NU Nxp Usa: 1 patents #1,089 of 2,066Top 55%
📍 Dripping Springs, TX: #3 of 178 inventorsTop 2%
🗺 Texas: #2,471 of 125,132 inventorsTop 2%
Overall (All Time): #79,820 of 4,157,543Top 2%
40
Patents All Time

Issued Patents All Time

Showing 26–40 of 40 patents

Patent #TitleCo-InventorsDate
6260123 Method and system for memory control and access in data processing systems Geoffrey S. Strongin 2001-07-10
6226721 Method and system for generating and utilizing speculative memory access requests in data processing systems Geoffrey S. Strongin 2001-05-01
6219769 Method and system for origin-sensitive memory control and access in data processing systems Geoffrey S. Strongin 2001-04-17
6112273 Method and apparatus for handling system management interrupts (SMI) as well as, ordinary interrupts of peripherals such as PCMCIA cards Weiyuen Kau, John H. Cornish, Shannon A. Wichman 2000-08-29
5943507 Interrupt routing circuits, systems and methods John H. Cornish, Shannon A. Wichman 1999-08-24
5905898 Apparatus and method for storing interrupt source information in an interrupt controller based upon interrupt priority Dan S. Mudgett, James R. MacDonald, Douglas D. Gephardt, Rodney Schmidt 1999-05-18
5894578 System and method for using random access memory in a programmable interrupt controller Joseph A. Bailey, Dan S. Mudgett 1999-04-13
5892956 Serial bus for transmitting interrupt information in a multiprocessing system Joseph A. Bailey, Dan S. Mudgett 1999-04-06
5850555 System and method for validating interrupts before presentation to a CPU Joseph A. Bailey, Dan S. Mudgett 1998-12-15
5850558 System and method for referencing interrupt request information in a programmable interrupt controller Joseph A. Bailey, Dan S. Mudgett 1998-12-15
5790871 System and method for testing and debugging a multiprocessing interrupt controller Steve Ennis, Michael T. Wisor 1998-08-04
5712991 Buffer memory for I/O writes programmable selective Shannon A. Wichman, John H. Cornish 1998-01-27
5703919 Fail-safe method to read a timer which is based on a particular clock with another asynchronous circit Joseph A. Bailey 1997-12-30
5684997 Integrated circuit design for handling of system management interrupts (SMI) Weiyuen Kau, John H. Cornish, Shannon A. Wichman 1997-11-04
5630108 Frequency independent PCMCIA control signal timing Shannon A. Wichman, John H. Cornish 1997-05-13