| 10891135 |
Register renaming of a shareable instruction operand cache |
Paul Kitchin, Ken Yu Lim, Ryan J. Hensley |
2021-01-12 |
| 10379814 |
Tininess prediction and handler engine for smooth handling of numeric underflow |
Ashraf Ahmed, Marc Augustin |
2019-08-13 |
| 9940101 |
Tininess prediction and handler engine for smooth handling of numeric underflow |
Ashraf Ahmed, Marc Augustin |
2018-04-10 |
| 9513908 |
Streaming memory transpose operations |
Ashraf Ahmed, Marc Augustin |
2016-12-06 |
| 9274938 |
Dynamic RAM Phy interface with configurable power states |
Shawn Searles, Brian Amick, Richard W. Reeves, Hanwoo Cho, Ronald L. Pettyjohn |
2016-03-01 |
| 8356155 |
Dynamic RAM Phy interface with configurable power states |
Shawn Searles, Brian Amick, Richard W. Reeves, Hanwoo Cho, Ronald L. Pettyjohn |
2013-01-15 |
| 7929361 |
Circuit using a shared delay locked loop (DLL) and method therefor |
Shawn Searles, Faisal A. Syed |
2011-04-19 |
| 7872937 |
Data driver circuit for a dynamic random access memory (DRAM) controller or the like and method therefor |
Shawn Searles, Faisal A. Syed |
2011-01-18 |
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Circuit for locking a delay locked loop (DLL) and method therefor |
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2011-01-11 |
