Mon-Ren Chene — 7 Patents at AMD

Mon-Ren Chene has been granted 7 US patents while listed as an inventor at AMD. The first was granted in 1993 and the most recent in May 2015. Mon-Ren Chene ranks #680,018 of 4,157,543 US inventors in our database (top 16.4%). Patent records list Mon-Ren Chene in Cupertino, CA, US.

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Showing 1–7 of 7 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
9032344	Verification module apparatus for debugging software and timing of an embedded processor design that exceeds the capacity of a single FPGA	—	2015-05-12
8607174	Verification module apparatus to serve as a prototype for functionally debugging an electronic design that exceeds the capacity of a single FPGA	—	2013-12-10
8356272	Logic verification module apparatus to serve as a hyper prototype for debugging an electronic design that exceeds the capacity of a single FPGA	—	2013-01-15
7353162	Scalable reconfigurable prototyping system and method	Thomas B. Huang	2008-04-01
5521837	Timing driven method for laying out a user's circuit onto a programmable integrated circuit device	Jon Frankle	1996-05-28	$20,448,000
5513124	Logic placement using positionally asymmetrical partitioning method	Stephen M. Trimberger	1996-04-30	$46,263,000
5224056	Logic placement using positionally asymmetrical partitioning algorithm	Stephen M. Trimberger	1993-06-29	$11,433,000

Mon-Ren Chene — 7 Patents

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