Issued Patents All Time
Showing 26–43 of 43 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5966026 | Output buffer with improved tolerance to overvoltage | Matthew P. Crowley | 1999-10-12 |
| 5963059 | Phase frequency detector having reduced blind spot | Ronald F. Talaga, Jr. | 1999-10-05 |
| 5774005 | Latching methodology | Robert C. Burd, Udin Salim, Frederick Daniel Weber, Luigi DiGregorio, Donald A. Draper | 1998-06-30 |
| 5764089 | Dynamic latching device | Robert C. Burd, Udin Salim, Frederick Daniel Weber, Luigi Di Gregorio, Donald A. Draper | 1998-06-09 |
| 5617283 | Self-referencing modulation circuit for CMOS integrated circuit electrostatic discharge protection clamps | David Benjamin Krakauer, Kaizad Mistry, Steven Butler | 1997-04-01 |
| 5576635 | Output buffer with improved tolerance to overvoltage | Matthew P. Crowley | 1996-11-19 |
| 5546354 | Static random access memory having tunable-self-timed control logic circuits | Steven Butler, Luan C. Tran | 1996-08-13 |
| 5508640 | Dynamic CMOS logic circuit with precharge | Donald A. Draper | 1996-04-16 |
| 5495447 | Method and apparatus using mapped redundancy to perform multiple large block memory array repair | Steven Butler | 1996-02-27 |
| 5487025 | Carry chain adder using regenerative push-pull differential logic | Donald A. Draper | 1996-01-23 |
| 5455528 | CMOS circuit for implementing Boolean functions | Donald A. Draper | 1995-10-03 |
| 5453713 | Noise-free analog islands in digital integrated circuits | Andrew Barber | 1995-09-26 |
| 5378945 | Voltage level converting buffer circuit | Steven Butler, Laun Q. Tran | 1995-01-03 |
| 5353424 | Fast tag compare and bank select in set associative cache | William R. Wheeler, Michael Leary, Michael A. Case, Steven Butler, Rajesh Khanna | 1994-10-04 |
| 5272445 | Resistance tester utilizing regulator circuits | Steven Lloyd | 1993-12-21 |
| 5253203 | Subarray architecture with partial address translation | Michael A. Case | 1993-10-12 |
| 4972101 | Noise reduction in CMOS driver using capacitor discharge to generate a control voltage | John Ngai | 1990-11-20 |
| 4857770 | Output buffer arrangement for reducing chip noise without speed penalty | Michael A. Van Buskirk | 1989-08-15 |