Issued Patents All Time
Showing 26–39 of 39 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5768574 | Microprocessor using an instruction field to expand the condition flags and a computer system employing the microprocessor | David S. Christie | 1998-06-16 |
| 5761452 | Bus arbiter method and system | Douglas A. Hooks | 1998-06-02 |
| 5754190 | System for reproducing images utilizing image libraries | Douglas D. Gephardt, Steven L. Belt, Brett B. Stewart, Rita M. Wisor | 1998-05-19 |
| 5754801 | Computer system having a multimedia bus and comprising a centralized I/O processor which performs intelligent data transfers | Andy Lambrecht, Scott E. Swanstrom | 1998-05-19 |
| 5748921 | Computer system including a plurality of multimedia devices each having a high-speed memory data channel for accessing system memory | Andy Lambrecht, Steve Belt | 1998-05-05 |
| 5740387 | Computer system having an expansion bus which includes normal and real time modes | Andy Lambrecht | 1998-04-14 |
| 5734843 | Reverse data channel as a bandwidth modulator | Douglas D. Gephardt, Brett B. Stewart, Rita M. Wisor, Steven L. Belt | 1998-03-31 |
| 5696927 | Memory paging system and method including compressed page mapping hierarchy | James R. MacDonald, Steve Cox | 1997-12-09 |
| 5680578 | Microprocessor using an instruction field to specify expanded functionality and a computer system employing same | David S. Christie | 1997-10-21 |
| 5625829 | Dockable computer system capable of symmetric multi-processing operations | Douglas D. Gephardt, Steven L. Belt | 1997-04-29 |
| 5615207 | Side bus to dynamically off load main bus | Douglas D. Gephardt, Brett B. Stewart, Rita M. Wisor, Steven L. Belt | 1997-03-25 |
| 5317715 | Reduced instruction set computer system including apparatus and method for coupling a high performance RISC interface to a peripheral bus having different performance characteristics | William M. Johnson, Timothy A. Olson, Sherman Lee, David W. Stoenner | 1994-05-31 |
| 5142672 | Data transfer controller incorporating direct memory access channels and address mapped input/output windows | William M. Johnson, Timothy A. Olson, Sherman Lee, David W. Stoenner | 1992-08-25 |
| 4878166 | Direct memory access apparatus and methods for transferring data between buses having different performance characteristics | William M. Johnson, Timothy A. Olson, Sherman Lee, David W. Stoenner | 1989-10-31 |