Issued Patents All Time
Showing 26–50 of 84 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8011436 | Through riser installation of tree block | Robert K. Voss, Peter Breese | 2011-09-06 |
| 7603550 | Computer system including a secure execution mode-capable CPU and a security services processor connected via a secure communication path | Kevin J. McGrath, Geoffrey S. Strongin, Dale E. Gulick, William A. Hughes | 2009-10-13 |
| 7603551 | Initialization of a computer system including a secure execution mode-capable processor | Kevin J. McGrath, Geoffrey S. Strongin, William A. Hughes, Dale E. Gulick | 2009-10-13 |
| 7513308 | Tubing running equipment for offshore rig with surface blowout preventer | Stanley Hosie, Alistair MacDonald, Paul Milne | 2009-04-07 |
| 7496966 | Method and apparatus for controlling operation of a secure execution mode-capable processor in system management mode | Kevin J. McGrath, Geoffrey S. Strongin | 2009-02-24 |
| 7451324 | Secure execution mode exceptions | Rodney Schmidt, Brian C. Barnes, Geoffrey S. Strongin | 2008-11-11 |
| 7401358 | Method of controlling access to control registers of a microprocessor | Kevin J. McGrath | 2008-07-15 |
| 7318480 | Tubing running equipment for offshore rig with surface blowout preventer | Stanley Hosie, Alistair MacDonald, Paul Milne | 2008-01-15 |
| 7165135 | Method and apparatus for controlling interrupts in a secure execution mode-capable processor | Kevin J. McGrath, Geoffrey S. Strongin | 2007-01-16 |
| 7146477 | Mechanism for selectively blocking peripheral device accesses to system memory | Geoffrey S. Strongin, William A. Hughes, Kevin J. McGrath | 2006-12-05 |
| 7130951 | Method for selectively disabling interrupts on a secure execution mode-capable processor | Geoffrey S. Strongin, Kevin J. McGrath | 2006-10-31 |
| 7130977 | Controlling access to a control register of a microprocessor | Kevin J. McGrath | 2006-10-31 |
| 7100028 | Multiple entry points for system call instructions | Kevin J. McGrath | 2006-08-29 |
| 7082507 | Method of controlling access to an address translation data structure of a computer system | Geoffrey S. Strongin, Kevin J. McGrath | 2006-07-25 |
| 7012604 | System architecture for high speed ray tracing | Uwe Kranich | 2006-03-14 |
| 6981132 | Uniform register addressing using prefix byte | Kevin J. McGrath | 2005-12-27 |
| 6877084 | Central processing unit (CPU) accessing an extended register set in an extended register mode | — | 2005-04-05 |
| 6810476 | Variable state save formats based on operand size of state save instruction | Kevin J. McGrath | 2004-10-26 |
| 6785790 | Method and apparatus for storing and retrieving security attributes | Rodney Schmidt, Geoffrey S. Strongin | 2004-08-31 |
| 6757771 | Stack switching mechanism in a computer system | — | 2004-06-29 |
| 6732258 | IP relative addressing | Kevin J. McGrath | 2004-05-04 |
| 6651163 | Exception handling with reduced overhead in a multithreaded multiprocessing system | Uwe Kranich | 2003-11-18 |
| 6574725 | Method and mechanism for speculatively executing threads of instructions | Uwe Kranich | 2003-06-03 |
| 6516395 | System and method for controlling access to a privilege-partitioned address space with a fixed set of attributes | — | 2003-02-04 |
| 6456891 | System and method for transparent handling of extended register states | Uwe Kranich | 2002-09-24 |