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USPTO Patent Rankings Data through Dec 31, 2025
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Candice H. Brown — 10 Patents

AMD: 8 patents #1,572 of 9,280Top 20%
PSPlanar Systems: 1 patents #37 of 88Top 45%
Comcast: 1 patents #2,448 of 4,447Top 60%
Sebastopol, CA: #24 of 246 inventorsTop 10%
California: #61,378 of 386,348 inventorsTop 20%
Overall (All Time): #481,000 of 4,157,543Top 15%
10 Patents All Time
Candice H. Brown has been granted 10 US patents while listed as an inventor at AMD. The first was granted in 1986 and the most recent in March 2019. Candice H. Brown ranks #481,000 of 4,157,543 US inventors in our database (top 11.6%). Patent records list Candice H. Brown in Sebastopol, CA, US.

Issued Patents All Time

Showing 1–10 of 10 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
10229956 High resolution low power consumption OLED display with extended lifetime Michael Hack, Michael S. Weaver, Julia J. Brown, Woo-Young So 2019-03-12 $31,770,000
5426266 Die bonding connector and method Davar I. Roshanagh 1995-06-20 $2,455,000
5126820 Thermal expansion compensated metal lead frame for integrated circuit package 1992-06-30 $5,219,000
4931852 High thermal conductivity/low alpha emission molding compound containing high purity semiconductor filler and integrated circuit package Homi Fatemi 1990-06-05 $1,550,000
4918511 Thermal expansion compensated metal lead frame for integrated circuit package 1990-04-17 $2,939,000
4820976 Test fixture capable of electrically testing an integrated circuit die having a planar array of contacts 1989-04-11 $2,469,000
4801999 Integrated circuit lead frame assembly containing voltage bussing and distribution to an integrated circuit die using tape automated bonding with two metal layers James Hayward 1989-01-31 $3,974,000
4729061 Chip on board package for integrated circuit devices using printed circuit boards and means for conveying the heat to the opposite side of the package from the chip mounting side to permit the heat to dissipate therefrom 1988-03-01 $5,584,000
4640010 Method of making a package utilizing a self-aligning photoexposure process 1987-02-03 $7,173,000
4616406 Process of making a semiconductor device having parallel leads directly connected perpendicular to integrated circuit layers therein 1986-10-14 $3,938,000