| 10673438 |
Digital signal processing block |
Ephrem C. Wu, John M. Thendean, Adnan Pratama, Yashodhara Parulkar, Xiaoqian Zhang |
2020-06-02 |
| 10110234 |
Efficient system debug infrastructure for tiled architecture |
Uma Durairajan, Subodh Kumar, Ghazaleh Mirjafari, Amitava Majumdar |
2018-10-23 |
| 9081634 |
Digital signal processing block |
James M. Simkins, Wayne E. Wennekamp, John M. Thendean, Richard L. Walke |
2015-07-14 |
| 8587337 |
Method and apparatus for capturing and synchronizing data |
Schuyler E. Shimanek, Wayne E. Wennekamp |
2013-11-19 |
| 8438357 |
Method and apparatus for calculating number of memory access cycles when transferring data to or from a memory |
Wayne E. Wennekamp, Roger D. Flateau, Jr. |
2013-05-07 |
| 8307182 |
Method and apparatus for transferring data to or from a memory |
Roger D. Flateau, Jr., Thomas H. Strader, Wayne E. Wennekamp, Schuyler E. Shimanek |
2012-11-06 |
| 8239590 |
Method and apparatus for transferring data between two different interfaces |
Wayne E. Wennekamp, Schuyler E. Shimanek, Steven E. McNeil |
2012-08-07 |
| 8222923 |
Method and apparatus for memory control with a programmable device |
Schuyler E. Shimanek, Wayne E. Wennekamp, Joe Eddie Leyba, II, Thomas H. Strader, Chidamber R. Kulkarni +2 more |
2012-07-17 |
| 8200874 |
Method and apparatus for arbitration among multiple ports |
Wayne E. Wennekamp, Schuyler E. Shimanek, Thomas H. Strader, Steven E. McNeil |
2012-06-12 |
| 8161249 |
Method and apparatus for multi-port arbitration using multiple time slots |
Thomas H. Strader, Wayne E. Wennekamp, Schuyler E. Shimanek |
2012-04-17 |
| 8116162 |
Dynamic signal calibration for a high speed memory controller |
Wayne E. Wennekamp, Schuyler E. Shimanek, Mikhail A. Wolf |
2012-02-14 |
| 8063660 |
Method and apparatus for configurable address translation |
Thomas H. Strader, Roger D. Flateau, Jr., Schuyler E. Shimanek, Wayne E. Wennekamp |
2011-11-22 |