DB

Drazen Borkovic

AM Amazon: 30 patents #301 of 19,158Top 2%
SY Synopsys: 6 patents #194 of 2,302Top 9%
SY Synplicity: 4 patents #6 of 31Top 20%
QU Quicklogic: 1 patents #34 of 70Top 50%
📍 Los Altos, CA: #261 of 3,651 inventorsTop 8%
🗺 California: #10,935 of 386,348 inventorsTop 3%
Overall (All Time): #74,307 of 4,157,543Top 2%
41
Patents All Time

Issued Patents All Time

Showing 26–41 of 41 patents

Patent #TitleCo-InventorsDate
11003429 Compile-time scheduling Jindrich Zejda, Jeffrey T. Huynh, Tobias Edler Von Koch, Taemin Kim 2021-05-11
10922146 Synchronization of concurrent computation engines Ilya Minkin, Ron Diamant, Jindrich Zejda, Dana Michelle Vantrease 2021-02-16
10846621 Fast context switching for computational networks Randy Renfu Huang, Ron Diamant, Jindrich Zejda 2020-11-24
10846201 Performance debug for networks Ron Diamant, Jindrich Zejda, Thomas A. Volpe 2020-11-24
10761822 Synchronization of computation engines with non-blocking instructions Jindrich Zejda, Taemin Kim, Ron Diamant 2020-09-01
9038013 Circuit partitioning and trace assignment in circuit design Awartika Pandey, Kenneth S. McElvain 2015-05-19
8726219 Analysis of digital circuits with time division multiplexing Kenneth S. McElvain 2014-05-13
8479142 Method and apparatus for the design and analysis of digital circuits with time division multiplexing Kenneth S. McElvain 2013-07-02
8458639 Circuit partitioning and trace assignment in circuit design Awartika Pandey, Kenneth S. McElvain 2013-06-04
8176452 Method and apparatus for circuit partitioning and trace assignment in circuit design Awartika Pandey, Kenneth S. McElvain 2012-05-08
7844930 Method and apparatus for circuit partitioning and trace assignment in circuit design Awartika Pandey, Kenneth S. McElvain 2010-11-30
7237214 Method and apparatus for circuit partitioning and trace assignment in circuit design Awartika Pandey, Kenneth S. McElvain 2007-06-26
7082582 Reducing clock skew in clock gating circuits Kenneth S. McElvain 2006-07-25
7007254 Method and apparatus for the design and analysis of digital circuits with time division multiplexing Kenneth S. McElvain 2006-02-28
6643829 Reducing clock skew in clock gating circuits Kenneth S. McElvain 2003-11-04
6519753 Programmable device with an embedded portion for receiving a standard circuit design Roger P. Ang, Atul Ahuja, Mukesh T. Lulla, Brian D. Small, Charles C. Tralka +2 more 2003-02-11