Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8884406 | Etch depth determination structure | Tiesheng Li, Yu Wang, Anup Bhalla | 2014-11-11 |
| 8053315 | Method to manufacture split gate with high density plasma oxide layer as inter-polysilicon insulation layer | Sung-Shan Tai, Yong-Zhong Hu, Francois Hebert, Hong Chang, Mengyu Pan +1 more | 2011-11-08 |
| 8021563 | Etch depth determination for SGT technology | Tiesheng Li, Yu Wang, Anup Bhalla | 2011-09-20 |
| 7795108 | Resistance-based etch depth determination for SGT technology | Tiesheng Li, Yu Wang, Anup Bhalla | 2010-09-14 |
| 7521332 | Resistance-based etch depth determination for SGT technology | Tiesheng Li, Yu Wang, Anup Bhalla | 2009-04-21 |