Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12205019 | Data layout conscious processing in memory architecture for executing neural network model | Minxuan ZHOU, Weifeng Zhang | 2025-01-21 |
| 11921814 | Method and device for matrix multiplication optimization using vector registers | Yu Pu, Yongzhi Zhang, Weifeng Zhang, Yuan Xie | 2024-03-05 |
| 11915138 | Method and device for reducing a size of a neural network model | Weifeng Zhang, Yu Pu, Yongzhi Zhang, Yuan Xie | 2024-02-27 |
| 11669443 | Data layout optimization on processing in memory architecture for executing neural network model | Minxuan ZHOU, Weifeng Zhang | 2023-06-06 |
| 11366875 | Method and device for matrix multiplication optimization using vector registers | Yu Pu, Yongzhi Zhang, Weifeng Zhang, Yuan Xie | 2022-06-21 |
| 11263131 | System and method for allocating memory space | Shuangchen Li, Dimin Niu, Fei Sun, Jingjun Chu, Hongzhong Zheng +3 more | 2022-03-01 |
| 10996976 | Systems and methods for scheduling neural networks by varying batch sizes | Shuai Che, Yingmin Li | 2021-05-04 |