Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date | Approx Value ⓘ |
|---|---|---|---|---|
| 6701140 | Digital receive phase lock loop with cumulative phase error correction and dynamically programmable correction rate | — | 2004-03-02 | $4,911,000 |
| 6665362 | Digital receive phase lock loop with phase-directed sample selection | — | 2003-12-16 | $7,570,000 |
| 6636092 | Digital receive phase lock loop with cumulative phase error correction | — | 2003-10-21 | $8,598,000 |
| 6373305 | Digital receive phase lock loop with residual phase error and cumulative phase error correction | — | 2002-04-16 | $9,763,000 |
| 5524267 | Digital I/O bus controller circuit with auto-incrementing, auto-decrementing and non-incrementing/decrementing access data ports | Arthur L. Chin, Serafin J. E. Garcia, Jr., Don S. Keener, Gregory J. Moore, Stephanie P. Payne | 1996-06-04 | $9,892,000 |
| 5299315 | Personal computer with programmable threshold FIFO registers for data transfer | Arthur L. Chin, Serafin J. Eleazar-Garcia, Jr., Timothy V. Lee, Don S. Keener, Gregory J. Moore | 1994-03-29 | $7,345,000 |