Issued Patents All Time
Showing 26–48 of 48 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7601568 | MOS transistor and method for producing a MOS transistor structure | — | 2009-10-13 |
| 7560334 | Method and system for incorporating high voltage devices in an EEPROM | Stefan Schwantes, Michael Graf, Alan Renninger, James Shen | 2009-07-14 |
| 7539965 | Circuit layout with active components and high breakdown voltage | Christoph Bromberger | 2009-05-26 |
| 7504692 | High-voltage field-effect transistor | Michael Graf, Stefan Schwantes | 2009-03-17 |
| 7407851 | DMOS device with sealed channel processing | Gayle W. Miller, Irwin Rathbun, Stefan Schwantes, Michael Graf | 2008-08-05 |
| 7402846 | Electrostatic discharge (ESD) protection structure and a circuit using the same | Stefan Schwantes, Michael Graf, Gayle W. Miller, Irwin Rathbun, Peter Grombach +1 more | 2008-07-22 |
| 7348256 | Methods of forming reduced electric field DMOS using self-aligned trench isolation | Gayle W. Miller, Michael Graf | 2008-03-25 |
| 7233044 | MOS transistor and method for producing a MOS transistor structure | — | 2007-06-19 |
| 7230342 | Registration mark within an overlap of dopant regions | Franz Dietz, Michael Graf, Stefan Schwantes, Gayle W. Miller | 2007-06-12 |
| 7189619 | Process for manufacturing vertically insulated structural components on SOI material of various thickness | Franz Dietz, Michael Graf | 2007-03-13 |
| 7144796 | Method of fabricating semiconductor components through implantation and diffusion in a semiconductor substrate | Franz Dietz, Michael Graf | 2006-12-05 |
| 7078324 | Method of fabricating a semiconductor component with active regions separated by isolation trenches | Michael Graf | 2006-07-18 |
| 7064385 | DMOS-transistor with lateral dopant gradient in drift region and method of producing the same | Michael Graf | 2006-06-20 |
| 7001804 | Method of producing active semiconductor layers of different thicknesses in an SOI wafer | Franz Dietz, Michael Graf | 2006-02-21 |
| 6933215 | Process for doping a semiconductor body | Christoph Bromberger, Franz Dietz, Michael Graf, Joern Herrfurth, Manfred Klaussner | 2005-08-23 |
| 6878603 | Process for manufacturing a DMOS transistor | Christoph Bromberger, Franz Dietz, Michael Graf, Joern Herrfurth, Manfred Klaussner | 2005-04-12 |
| 6806131 | Process for manufacturing a DMOS transistor | Christoph Bromberger, Franz Dietz, Michael Graf, Joern Herrfurth, Manfred Klaussner | 2004-10-19 |
| 6780713 | Process for manufacturing a DMOS transistor | Christoph Bromberger, Franz Dietz, Michael Graf, Joern Herrfurth, Manfred Klaussner | 2004-08-24 |
| 6764923 | Method for manufacturing components of an SOI wafer | Harry Dietrich, Andreas Paul Schueppen | 2004-07-20 |
| 6720238 | Method for manufacturing buried areas | Harry Dietrich, Andreas Paul Schueppen | 2004-04-13 |
| 6716721 | Method for manufacturing a silicon wafer | Harry Dietrich, Andreas Paul Schueppen | 2004-04-06 |
| 5990539 | Transistor component having an integrated emitter resistor | Gerhard Conzelmann, Heinz Pfizenmaier, Wolfgang Appel, Helmut Schneider | 1999-11-23 |
| 5635753 | Integrated circuit | Bernd Hofflinger | 1997-06-03 |