Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8093640 | Method and system for incorporating high voltage devices in an EEPROM | Stefan Schwantes, Volker Dudek, Michael Graf, James Shen | 2012-01-10 |
| 7848151 | Circuit to control voltage ramp rate | Johnny Chan, Philip Ng, Jinshu Son, Jeffrey Ming-Hung Tsai, Tin-Wai Wong +1 more | 2010-12-07 |
| 7560334 | Method and system for incorporating high voltage devices in an EEPROM | Stefan Schwantes, Volker Dudek, Michael Graf, James Shen | 2009-07-14 |
| 7512008 | Circuit to control voltage ramp rate | Johnny Chan, Philip Ng, Jinshu Son, Jeffrey Ming-Hung Tsai, Tin-Wai Wong +1 more | 2009-03-31 |
| RE40486 | Self-aligned non-volatile memory cell | Bohumil Lojek | 2008-09-09 |
| 7423912 | SONOS memory array with improved read disturb characteristic | Gust Perlegos, James Yount, Maria Ryan | 2008-09-09 |
| 7037786 | Method of forming a low voltage gate oxide layer and tunnel oxide layer in an EEPROM cell | James Shen | 2006-05-02 |
| 6841823 | Self-aligned non-volatile memory cell | Bohumil Lojek | 2005-01-11 |
| 6624027 | Ultra small thin windows in floating gate transistors defined by lost nitride spacers | Eleonore Daemen, Bohumil Lojek | 2003-09-23 |
| 6624029 | Method of fabricating a self-aligned non-volatile memory cell | Bohumil Lojek | 2003-09-23 |
| 6479351 | Method of fabricating a self-aligned non-volatile memory cell | Bohumil Lojek | 2002-11-12 |