Issued Patents 2025
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12412775 | Isolation structures in semiconductor devices | Fu-Ting Yen, Wei-Ting Yeh, Shih-Cheng Chen | 2025-09-09 |
| 12347717 | Debonding structures for wafer bonding | Wei-Ting Yeh, Zheng-Yong Liang, De-Yang Chiou, Keng-Chu Lin | 2025-07-01 |
| 12341013 | Method and structure for barrier-less plug | Sung-Li Wang, Hung-Yi Huang, Mrunal A. Khaderbad, Chia-Hung Chu, Shuen-Shin Liang +1 more | 2025-06-24 |
| 12336214 | Inner spacers for gate-all-around semiconductor devices | Fu-Ting Yen, Ting-Ting Chen, Keng-Chu Lin, Tsu-Hsiu Perng | 2025-06-17 |
| 12315837 | Storage layers for wafer bonding | De-Yang Chiou, Fu-Ting Yen, Keng-Chu Lin | 2025-05-27 |
| 12308312 | Interconnect structure and method for manufacturing the interconnect structure | KHADERBAD MRUNAL ABHIJITH, Fu-Ting Yen, Chen-Han Wang, Tsu-Hsiu Perng, Keng-Chu Lin | 2025-05-20 |
| 12283618 | Inner spacer for semiconductor device | Fu-Ting Yen, Kuei-Lin CHAN | 2025-04-22 |
| 12255239 | Liner layer for backside contacts of semiconductor devices | Mrunal A. Khaderbad, Keng-Chu Lin | 2025-03-18 |
| 12255249 | Inner spacer structures for gate-all-around field effect transistors | Mrunal A. Khaderbad, Keng-Chu Lin | 2025-03-18 |