Partial year: Data through Q3 2025 (Sept 30). Full-year totals not yet available.
YC

Yen-Huei Chen

TSMC: 15 patents #123 of 3,957Top 4%
TL Tsmc Nanjing Company, Limited: 1 patents #17 of 64Top 30%
📍 Dashulong, TW: #7 of 446 inventorsTop 2%
Overall (2025): #2,519 of 469,880Top 1%
15
Patents 2025

Issued Patents 2025

Showing 1–15 of 15 patents

Patent #TitleCo-InventorsDate
12431192 Semiconductor device Nikhil Puri, Venkateswara Reddy Konudula, Teja Masina, Hung-Jen Liao, Hidehiro Fujiwara 2025-09-30
12412621 Semiconductor device including distributed write driving arrangement Hidehiro Fujiwara, Hung-Jen Liao, Li-Wen Wang, Jonathan Tsung-Yung Chang 2025-09-09
12408316 Memory array circuit and method of manufacturing same Hidehiro Fujiwara, Chih-Yu Lin, Hsien-Yu Pan, Yasutoshi Okuno, Hung-Jen Liao 2025-09-02
12406704 Multi-stage bit line pre-charge Wei-Cheng Wu, Kao-Cheng Lin, Chih-Cheng Yu, Pei-Yuan Li, Chien-Chen Lin +1 more 2025-09-02
12387768 Memory device including separate negative bit line Chih-Yu Lin, Yi-Hsin Nien, Hidehiro Fujiwara 2025-08-12
12380946 Memory computation method Hidehiro Fujiwara, Hung-Jen Liao, Jonathan Tsung-Yung Chang 2025-08-05
12367929 Memory device having a negative voltage circuit Yi-Hsin Nien, Hidehiro Fujiwara, Chih-Yu Lin 2025-07-22
12346143 Voltage regulator with power rail tracking Haruki Mori, Hidehiro Fujiwara, Zhi-Hao Chang, Yangsyu Lin, Yu-Hao Hsu +2 more 2025-07-01
12334145 Bitcell supporting bit-write-mask function Hidehiro Fujiwara, Yi-Hsin Nien 2025-06-17
12334178 Integrated circuit, system and method of forming the same Yen Lin CHUNG, Kao-Cheng Lin, Wei Min Chan 2025-06-17
12308303 Integrated circuit die with memory macro including through-silicon via and method of forming the same Hidehiro Fujiwara, Tze-Chiang Huang, Hong-Chen Cheng, Hung-Jen Liao, Jonathan Tsung-Yung Chang +2 more 2025-05-20
12260903 Memory devices with improved bit line loading Yi-Hsin Nien, Hidehiro Fujiwara, Chih-Yu Lin 2025-03-25
12260904 Memory device with additional write bit lines Hidehiro Fujiwara, Chia-En Huang, Jui-Che Tsai, Yih Wang 2025-03-25
12245412 SRAM cell word line structure with reduced RC effects Hidehiro Fujiwara, Wei Min Chan, Chih-Yu Lin, Hung-Jen Liao 2025-03-04
12230318 Memory device including a word line with portions with different sizes in different metal layers Yi-Hsin Nien, Wei Zhao, Chih-Yu Lin, Hidehiro Fujiwara, Ru-Yu WANG 2025-02-18