Issued Patents 2025
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12387768 | Memory device including separate negative bit line | Chih-Yu Lin, Hidehiro Fujiwara, Yen-Huei Chen | 2025-08-12 |
| 12367929 | Memory device having a negative voltage circuit | Hidehiro Fujiwara, Chih-Yu Lin, Yen-Huei Chen | 2025-07-22 |
| 12369292 | Memory device | Chih-Yu Lin, Wei Zhao, Hidehiro Fujiwara | 2025-07-22 |
| 12334145 | Bitcell supporting bit-write-mask function | Hidehiro Fujiwara, Yen-Huei Chen | 2025-06-17 |
| 12260903 | Memory devices with improved bit line loading | Hidehiro Fujiwara, Chih-Yu Lin, Yen-Huei Chen | 2025-03-25 |
| 12230318 | Memory device including a word line with portions with different sizes in different metal layers | Wei Zhao, Chih-Yu Lin, Hidehiro Fujiwara, Yen-Huei Chen, Ru-Yu WANG | 2025-02-18 |