PW

Ping-Wei Wang

TSMC: 17 patents #98 of 3,957Top 3%
📍 Hsinchu, CA: #7 of 221 inventorsTop 4%
Overall (2025): #2,042 of 469,880Top 1%
17
Patents 2025

Issued Patents 2025

Showing 1–17 of 17 patents

Patent #TitleCo-InventorsDate
12426226 Macro and SRAM bit cell cooptimizatoin for performance (long/shortwordline combo SRAM) Lien Jung Hung, Kuo-Hsiu Hsu, Kian-Long Lim, Yu-Kuan Lin, Chia-Hao Pao +3 more 2025-09-23
12419197 Memory device and method of forming the same Hsin-Wen Su, Jui-Lin Chen, Shih-Hao Lin, Chih-Chuan Yang, Ming-Yen Chuang +1 more 2025-09-16
12402292 Static random access memory with magnetic tunnel junction cells Jui-Lin Chen, Yu-Kuan Lin 2025-08-26
12376277 Compact electrical connection that can be used to form an SRAM cell and method of making the same Yu-Kuan Lin, Chang-Ta Yang, Kuo-Yi Chao, Mei-Yun Wang 2025-07-29
12367924 SRAM design with four-poly-pitch Chih-Chuan Yang, Feng-Ming Chang, Kuo-Hsiu Hsu 2025-07-22
12367925 Static random access memory layout Chih-Chuan Yang, Jui Chang, Feng-Ming Chang, Kian-Long Lim, Kuo-Hsiu Hsu +1 more 2025-07-22
12363893 Semiconductor memory structure Hsin-Wen Su, Shih-Hao Lin, Yu-Kuan Lin, Lien Jung Hung 2025-07-15
12349330 Shared pick-up regions for memory devices Chih-Chuan Yang, Chao-Yuan Chang, Shih-Hao Lin, Chia-Hao Pao, Feng-Ming Chang +1 more 2025-07-01
12349329 Memory device and method for forming the same Hsin-Wen Su, Chih-Chuan Yang, Shih-Hao Lin, Yu-Kuan Lin, Lien Jung Hung 2025-07-01
12302543 Integrated circuit device with reduced via resistance Jui-Lin Chen, Yu-Kuan Lin 2025-05-13
12302609 Semiconductor device including alternating semiconductor layers with different widths and method for forming the same Hsin-Wen Su, Yu-Kuan Lin, Shih-Hao Lin, Lien Jung Hung 2025-05-13
12274045 Well pick-up region design for improving memory macro performance Chih-Chuan Yang, Chang-Ta Yang 2025-04-08
12256528 Compact static random-access memory structure Ruey-Wen Chang, Feng-Ming Chang 2025-03-18
12249636 Tuning gate lengths in multi-gate field effect transistors Chia-Hao Pao, Chih-Chuan Yang, Shih-Hao Lin, Kian-Long Lim, Chih-Hsuan Chen 2025-03-11
12243912 Source/drain feature for multigate device performance and method of fabricating thereof Chih-Chuan Yang, Wen-Chun Keng, Chong-De Lien, Shih-Hao Lin, Hsin-Wen Su 2025-03-04
12219747 Memory active region layout for improving memory performance Chia-Hao Pao, Chih-Chuan Yang, Shih-Hao Lin, Chih-Hsuan Chen, Kian-Long Lim +3 more 2025-02-04
12200921 Memory device and method for forming the same Hsin-Wen Su, Chih-Chuan Yang, Shih-Hao Lin, Yu-Kuan Lin, Lien Jung Hung 2025-01-14