Issued Patents 2025
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12430246 | Out-of-order programming of first wordline in a physical unit of a memory device | Deping He | 2025-09-30 |
| 12417026 | Adaptive sensing time for memory operations | Yu-Chung Lien, Zhenming Zhou, Murong Lang | 2025-09-16 |
| 12387781 | Corrective reads with improved recovery from data retention loss | Huai-Yuan Tseng, Akira Goda, Eric N. Lee, Tomoharu Tanaka | 2025-08-12 |
| 12387795 | Low stress refresh erase in a memory device | Ronit Roneel Prakash, Pitamber Shukla, Murong Lang, Zhenming Zhou | 2025-08-12 |
| 12340850 | Source bias temperature compensation for read and program verify operations on a memory device | Ronit Roneel Prakash | 2025-06-24 |
| 12333160 | Memory read operation using a voltage pattern based on a read command type | Yu-Chung Lien, Zhenming Zhou | 2025-06-17 |
| 12322451 | Memory systems with flexible erase suspend-resume operations, and associated systems, devices, and methods | Pitamber Shukla, Jiun-Horng Lai, Fulvio Rori, Wai Ying Lo, Scott Anthony Stoller | 2025-06-03 |
| 12308074 | Enhanced gradient seeding scheme during a program operation in a memory sub-system | Vinh Diep, Yingda Dong | 2025-05-20 |
| 12308583 | Joint and connector including the same | Ching-Neng Kan, Yihung Chang, Li-Chin Yang | 2025-05-20 |
| 12300322 | Selective increase and decrease to pass voltages for programming a memory device | Vinh Diep, Jeffrey Ming-Hung Tsai, Yingda Dong | 2025-05-13 |
| 12242755 | Adaptive enhanced corrective read based on write and read temperature | Zhenming Zhou, Murong Lang, Nagendra Prasad Ganesh Rao | 2025-03-04 |
| 12217801 | Bias voltage schemes during pre-programming and programming phases | Vinh Diep, Yingda Dong | 2025-02-04 |
| 12197739 | Adaptive bitline voltage for memory operations | Yu-Chung Lien, Zhenming Zhou | 2025-01-14 |