Issued Patents 2025
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12417026 | Adaptive sensing time for memory operations | Zhenming Zhou, Murong Lang, Ching-Huang Lu | 2025-09-16 |
| 12417028 | Dynamic erase operation selection using erase policy | Zhenming Zhou | 2025-09-16 |
| 12417808 | Single-level cell programming with adaptive wordline ramp rate | Joshua Garrison, Zhenming Zhou | 2025-09-16 |
| 12373116 | Dynamic read retry voltage sequences in a memory subsystem | Zhenming Zhou, Tomer Eliash | 2025-07-29 |
| 12333160 | Memory read operation using a voltage pattern based on a read command type | Ching-Huang Lu, Zhenming Zhou | 2025-06-17 |
| 12254926 | Memory device with fast write mode to mitigate power loss | Juane Li, Sead Zildzic, Zhenming Zhou | 2025-03-18 |
| 12249378 | CELSRC voltage separation between SLC and XLC for SLC program average ICC reduction | Deepanshu Dutta, Sarath Puthenthermadam, Jiahui Yuan | 2025-03-11 |
| 12248697 | Dynamic read level trim selection for scan operations of memory devices | Li-Te Chang, Zhenming Zhou | 2025-03-11 |
| 12237015 | Adaptive sensing time for memory operations | Vivek Shivhare, Vinh Diep, Zhenming Zhou | 2025-02-25 |
| 12237003 | Management of dynamic read voltage sequences in a memory subsystem | Zhenming Zhou | 2025-02-25 |
| 12211556 | Independent sensing times | Zhenming Zhou | 2025-01-28 |
| 12197739 | Adaptive bitline voltage for memory operations | Ching-Huang Lu, Zhenming Zhou | 2025-01-14 |
| 12189961 | Charge loss mitigation through dynamic programming sequence | Zhenming Zhou | 2025-01-07 |