Issued Patents 2025
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12431197 | Programming operation using cache register release in a memory sub-system | Walter Di Francesco, Violante Moschiano | 2025-09-30 |
| 12411770 | Hybrid parallel programming of single-level cell memory | Violante Moschiano, Walter Di Francesco | 2025-09-09 |
| 12380931 | Cross-temperature compensation in a memory sub-system | Andrea Giovanni Xotta, Tommaso Vali | 2025-08-05 |
| 12374404 | Algorithm qualifier commands | Anna Chiara Siviero | 2025-07-29 |
| 12340851 | Memories for performing successive programming operations | Violante Moschiano, Walter Di Francesco, Dheeraj Srinivasan | 2025-06-24 |
| 12327595 | Shortened single-level cell memory programming | Leo Raimondo, Federica Paolini, Violante Moschiano, Gianfranco Valeri, Davide Esposito +1 more | 2025-06-10 |
| 12271592 | Independent plane architecture in a memory device | Andrea Giovanni Xotta, Dheeraj Srinivasan, Ali Mohammadzadeh, Karl D. Schuh, Guido Luciano Rizzo +7 more | 2025-04-08 |
| 12189993 | Memory devices for suspend and resume operations | Floriano Montemurro | 2025-01-07 |