Issued Patents 2025
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12373287 | Distribution of error checking and correction (ECC) bits to allocate ECC bits for metadata | Rajat Agarwal, Wei-Pin Chen, James A. McCall | 2025-07-29 |
| 12347507 | Method and apparatus for memory chip row hammer threat backpressure signal and host side response | Kuljit S. Bains, Jongwon Lee, Sreenivas Mandava | 2025-07-01 |
| 12332739 | Buffer that supports burst transfers having parallel CRC and data transmissions | James A. McCall, Zibing Yang, Yanjie Zhu | 2025-06-17 |
| 12321634 | Double fetch for long burst length memory data transfer | Kuljit S. Bains | 2025-06-03 |
| RE50373 | Reading from a mode register having different read and write timing | Christopher E. Cox | 2025-04-08 |
| 12217787 | Apparatus, system and method to detect and improve an input clock performance of a memory device | Arvind Kumar, James A. McCall, John R. Goles, Dean-Dexter R. Eugenio | 2025-02-04 |
| 12190979 | Dynamic random access memory built-in self-test power fail mitigation | — | 2025-01-07 |