Issued Patents 2025
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12367943 | Reference voltage adjustment per path for high speed memory signaling | Arvind Kumar, John R. Goles | 2025-07-22 |
| 12272426 | Duty cycle adjuster optimization training algorithm to minimize the jitter associated with DDR5 DRAM transmitter | Arvind Kumar, Santhosh Muskula | 2025-04-08 |
| 12217787 | Apparatus, system and method to detect and improve an input clock performance of a memory device | Arvind Kumar, James A. McCall, Bill Nale, John R. Goles | 2025-02-04 |
| 12204751 | Reference voltage training per path for high speed memory signaling | Arvind Kumar, John R. Goles, Santhosh Muskula | 2025-01-21 |