Issued Patents 2025
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12426307 | Dual metal gate structures on nanoribbon semiconductor devices | Yang-Chun Cheng, Dax M. Crum | 2025-09-23 |
| 12376353 | Source/drain regions in integrated circuit structures | Sean T. Ma, Guillaume Bouche | 2025-07-29 |
| 12327791 | Integrated circuit structures with gate cuts above buried power rails | — | 2025-06-10 |
| 12328936 | Gate spacing in integrated circuit structures | Guillaume Bouche, Sean T. Ma | 2025-06-10 |
| 12315805 | Self-aligned lateral contacts | Yang-Chun Cheng, Shaestagir Chowdhury, Guillaume Bouche | 2025-05-27 |
| 12237388 | Transistor arrangements with stacked trench contacts and gate straps | Changyok Park, Guillaume Bouche, Hyuk-Ju Ryu, Charles H. Wallace, Mohit K. HARAN | 2025-02-25 |
| 12211786 | Stacked vias with bottom portions formed using selective growth | Guillaume Bouche | 2025-01-28 |
| 12211898 | Device contact sizing in integrated circuit structures | Guillaume Bouche, Sean T. Ma | 2025-01-28 |
| 12199161 | Contact over active gate structures with tapered gate or trench contact for advanced integrated circuit structure fabrication | Charles H. Wallace, Mohit K. HARAN | 2025-01-14 |