Issued Patents 2025
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12426342 | Low germanium, high boron silicon rich capping layer for PMOS contact resistance thermal stability | Debaleena Nandi, Cory Bomberger, Gilbert Dewey, Anand S. Murthy, Mauro J. Kobrinsky +6 more | 2025-09-23 |
| 12414366 | Co-integration of high voltage (HV) and low voltage (LV) transistor structures, using channel height and spacing modulation | Prashant Majhi, Anand S. Murthy, Glenn A. Glass, Susmita Ghose | 2025-09-09 |