Issued Patents 2025
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12339701 | Insertion delay and area tradeoff for buffering solution selection in clock tree synthesis | Sheng-En David Lin, Natarajan Viswanathan, Charles J. Alpert | 2025-06-24 |
| 12321193 | Hierarchically-aware buffering for clock structures | Sheng-En David Lin, Natarajan Viswanathan, Charles J. Alpert | 2025-06-03 |